OTHER POSITIONS

Visiting Researcher at CAPS Entreprise (September 2011 - December 2011)

Visiting Researcher at IRISA (September 2011 - December 2011)

BIO

José M. Andión (A Coruña, 1985) received a B.Sc. & M.Sc. (2008) and a Ph.D. (2015) in Computer Engineering, both at the University of A Coruña (UDC), Spain. He completed his education through a research visit to the Institut de Recherche en Informatique et Systèmes Aleatoires (IRISA), and to the spin-off company CAPS Entreprise, in Rennes, France.

His main research area is High Performance Computing (HPC). After first experiences with the development of a library of collective operations for the UPC language (M.Sc. Thesis graded with 10/10), his research has focused on compilation techniques during his Ph.D. Thesis (with International Mention and awarded with Sobresaliente Cum Laude). In particular, his work has addressed the automatic detection of parallelism in the source code and the generation of efficient code for heterogeneous architectures, focused on improving the locality of reference. Following this research line, he currently works in the analysis of execution traces without accessing source/binary code. As of June 2016, Dr. Andión has published 12 papers (2 of them in JCR journals and 2 in CORE Type-A conferences). In addition, he has participated in 27 national and international R&D projects, contracts and networks (in 1 of them as PI), funded by competitive public calls or by private contracts. Part of his work has been licensed and is being exploited by the spin-off company Appentra.

Finally, he has taught more than 600 hours in the UDC. His students gave him an evaluation higher than the averages of the whole faculty and the university. He has belonged, by election, to governing bodies in all levels.

RESEARCH INTERESTS

Parallelizing compilers for multicore and manycore architectures, focusing on the exploitation of the locality of reference.

Compilation techniques for automatic data allocation in scratchpad memories to reduce power consumption on SoCs and MPSoCs.

Embedded computing in mobile robotic systems.

Development of tunable collective operations for multicore clusters.

Productive parallel programming models for scientific applications, in particular PGAS and the UPC language.

PUBLICATIONS

José M. Andión, Gabriel Rodríguez, Mahmut T. Kandemir and Juan Touriño.
A tool for reconstructing codes from memory traces.
12th International Summer School on Advanced Computer Architecture and Compilation for High-Performance and Embedded Systems (ACACES), Fiuggi, Italy. July, 2016.
abstract   poster

José M. Andión, Manuel Arenaz, François Bodin, Gabriel Rodríguez and Juan Touriño.
Locality-Aware Automatic Parallelization for GPGPU with OpenHMPP Directives.
International Journal of Parallel Programming, 44:620-643. June 2016.
DOI   SN SharedIt   pre-print

Gabriel Rodríguez, José M. Andión, Mahmut T. Kandemir and Juan Touriño.
Trace-based Affine Reconstruction of Codes.
14th Annual IEEE/ACM International Symposium on Code Generation and Optimization (CGO), Barcelona, Spain. March, 2016.
web   DOI   ACM DL   pre-print

José M. Andión. Advisors: Gabriel Rodríguez and Manuel Arenaz.
Compilation Techniques for Automatic Extraction of Parallelism and Locality in Heterogeneous Architectures.
PhD Thesis, A Coruña, Spain. December, 2015.
repo   manuscript   slides

Sabela Ramos, Susana Ladra, Ana Freire, Verónica Bolón-Canedo, Beatriz Remeseiro, José M. Andión and Laura M. Castro.
WikinformáticA: visibilización del papel de la mujer en las nuevas tecnologías y promoción de la ingeniería en informática entre las estudiantes de secundaria.
XXI Jornadas de la Enseñanza Universitaria de la Informática (JENUI), Andorra la Vella, Andorra. July, 2015.
repo   pre-print   web

Gabriel Rodríguez, José M. Andión, Juan Touriño and Mahmut T. Kandemir.
Reconstructing affine codes from their memory traces.
Pennsylvania State University Technical Report CSE #15-001, University Park, PA, USA. February, 2015.
PSU   UDC

José M. Andión, Manuel Arenaz, François Bodin, Gabriel Rodríguez and Juan Touriño.
Locality-Aware Automatic Parallelization for GPGPU with OpenHMPP Directives.
7th International Symposium on High-level Parallel Programming and Applications (HLPP), Amsterdam, Netherlands. July, 2014.
pre-print   slides

José M. Andión, Manuel Arenaz, Gabriel Rodríguez and Juan Touriño.
A Parallelizing Compiler for Multicore Systems.
17th International Workshop on Software and Compilers for Embedded Systems (SCOPES), Schloss Rheinfels, St. Goar, Germany. June, 2014.
DOI   ACM DL   pre-print   slides   poster

José M. Andión, Manuel Arenaz, Gabriel Rodríguez and Juan Touriño.
A Novel Compiler Support for Automatic Parallelization on Multicore Systems.
Parallel Computing, Volume 39, Issue 9. September, 2013.
DOI   pre-print

José M. Andión, Manuel Arenaz and Juan Touriño.
Una Nueva Representación Intermedia para GCC basada en el Entorno de Compilación XARK.
XXI Jornadas de Paralelismo (JP), Valencia, Spain. September, 2010.
pre-print   slides

José M. Andión, Manuel Arenaz and Juan Touriño.
Domain-Independent Kernel-Based Intermediate Representation for Automatic Parallelization of Sequential Programs.
6th International Summer School on Advanced Computer Architecture and Compilation for High-Performance and Embedded Systems (ACACES), Terrassa, Spain. July, 2010.
abstract   poster

José M. Andión, Manuel Arenaz and Juan Touriño.
Automatic Partitioning of Sequential Applications Driven by Domain-Independent Kernels.
15th Workshop on Compilers for Parallel Computing (CPC), Vienna, Austria. July, 2010.
pre-print   slides

José M. Andión, Manuel Arenaz and Juan Touriño.
A New Intermediate Representation for GCC based on the XARK Compiler Framework.
2nd International Workshop on GCC Research Opportunities (GROW) (in conjunction with the International Conference on High-Performance Embedded Architectures and Compilers (HiPEAC)), Pisa, Italy. January, 2010.
pre-print   slides

José M. Andión, Guillermo L. Taboada, Juan Touriño and Ramón Doallo.
Biblioteca de Comunicaciones Colectivas para el Lenguaje de Programación Paralela UPC.
XX Jornadas de Paralelismo (JP), A Coruña, Spain. September, 2009.
pre-print   slides

TEACHING

Fundamentos de Computadores | Grao en Enxeñaría Informática
This couse focuses on the study of the fundamental concepts behind digital systems and computers, a computer's basic structure and how its different components work.

Estrutura de Computadores | Grao en Enxeñaría Informática
In this course, the architecture, organization, function, and design of a computer are studied in depth. The key performance metrics of a computer are also covered. Finally, this course also gives an introduction to parallel systems and storage systems.

Fundamentos de Programación | Grao en Tecnoloxías Mariñas
This course is intented to introduce the students in the world of the structured programming. The different ways to organise data and the main control structures are covered through the development of an Arduino-based mobile robot.

Electrónica. Sistemas Electrónicos do Buque | Grao en Tecnoloxías Mariñas
This course is designed to acquire the basic physical concepts related to ship engine room control systems. Semiconductor devices are covered: diodes, bipolar and unipolar transistors, operational amplifiers and logic gates.

If you don’t make mistakes, you’re not working on hard enough problems. And that’s a big mistake. (Frank Wilczek)

Computer Architecture Group Facultade de Informática da Coruña Universidade da Coruña Iniciativas Culturais e Deportivas Universitarias