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  • Fabeiro, J. F., Andrade, D., Fraguela, B. B. and Doallo, R. Automatic Generation of Optimized OpenCL Codes Using OCLoptimizer. In The Computer Journal, 58 (11): 3057-3073, 2015. doi..  more.. 
  • Viñas, M., Fraguela, B. B., Boszkus, Z. and Andrade, D. Improving OpenCL programmability with the Heterogeneous Programming Library. In International Conference on Computational Science [ACCEPTED FOR PUBLICATION], 2015.
  • Viñas, M., Bozkus, Z., Fraguela, B. B., Andrade, D. and Doallo, R. Developing adaptive multi-device applications with the Heterogeneous Programming Library. In Journal of Supercomputing: [PUBLISHED ONLINE FIRST], 2015. doi.. 
  • Fabeiro, J. F., Andrade, D., Fraguela, B. B. and Doallo, R. Writing Self-adaptive Codes for Heterogeneous Systems. In 20th International Conference Euro-Par 2014 Parallel Processing, pages 1322-1331, 2014. doi.. 
  • Rolán, D., Andrade, D., Fraguela, B. B. and Doallo, R. A fine-grained thread-aware management policy for shared caches. In Concurrency and Computation: Practice and Experience, 26 (6): 1355-1374, 2014. doi.. 
  • Andrade, D., Fraguela, B. B. and Doallo, R. Address independent estimation of the boundaries of cache performance. In Microprocessors and Microsystems - Embedded Hardware Design, 38 (2): 137-151, 2014. doi.. 
  • Gonzalez, C. H., Fraguela, B. B., Andrade, D., García, J. A. and Castro, M. J. Numerical simulation of pollutant transport in a shallow-water system on the Cell heterogeneous processor. In The Journal of Supercomputing, 65 (3): 1089-1103, 2013. doi.. 
  • Fabeiro, J. F., Andrade, D. and Fraguela, B. B. OCLoptimizer: An Iterative Optimization Tool for OpenCL. In International Conference on Computational Science, pages 1322-1331, 2013. doi.. 
  • Andrade, D., Fraguela, B. B. and Doallo, R. Accurate prediction of the behavior of multithreaded applications in shared caches. In Parallel Computing, 39 (1): 36 - 57, 2013. doi.. 
  • Andrade, D., Fraguela, B. B. and Doallo, R. Static analysis of the worst-case memory performance for irregular codes with indirections. In ACM Trans. Archit. Code Optim., 9 (3): 20:1-20:32, 2012. doi.. 
  • Vega, A. de, Andrade, D. and Fraguela, B. B. An efficient parallel set container for multicore architectures. In Parallel Computing (ParCo), pages 369-376, 2011.
  • Fraguela, B. B., Andrade, D. and Doallo, R. Address-Independent Estimation of the Worst-case Memory Performance. In Transaction on Industrial Informatics, 6 (4): -, 2010.
  • Andrade, D., Fraguela, B. B. and Doallo, R. Static Prediction of Worst-Case Data Cache Performance in the Absence of Base Address Information. In IEEE Real-Time and Embedded Technology and Applications Symposium (RTAS), pages 45-54, IEEE Computer Society, 2009. doi.. 
  • Andrade, D., Fraguela, B. B., Brodman, J. C. and Padua, D. A. Task-Parallel versus Data-Parallel Library-Based Programming in Multicore Systems. In Euromicro International Conference on Parallel, Distributed, and Network-Based Processing (PDP), pages 101-110, 2009. doi.. 
  • González, C. H., Fraguela, B. B., Andrade, D. and Castro, J. A. G. y M. J. Programación de Alto Rendimiento en el Procesador Cell: Aplicación a Simulación de Fluídos. In Actas de las XX Jornadas de Paralelismo, pages 333-340, 2009.
  • Andrade, D., Fraguela, B. B., Brodman, J. C. and Padua, D. A. Task-Parallel versus Data-Parallel Library-Based Programming in Multicore Systems. In Workshop on Programmability Issues for Multi-Core Computers (MULTIPROG), 2008. doi.. 
  • Andrade, D., Arenaz, M., Fraguela, B. B., Touriño, J. and Doallo, R. Automated and accurate cache behavior analysis for codes with irregular access patterns. In Concurrency and Computation: Practice and Experience (CCPE), 19 (18): 2407-2423, 2007. doi.. 
  • Andrade, D., Fraguela, B. B. and Doallo, R. Precise automatable analytical modeling of the cache behavior of codes with indirections. In ACM Transactions on Architecture and Code Optimizations (TACO), 4 (3): 16, 2007. doi.. 
  • Andrade, D., Fraguela, B. B. and Doallo, R. Analytical modeling of codes with arbitrary data-dependent conditional structures. In Journal of Systems Architecture (JSA), 52 (7): 394-410, 2006. doi.. 
  • Andrade, D., Fraguela, B. B. and Doallo, R. Cache Behavior Modelling for Codes Involving Banded Matrices. In Workshops on Languages and Compilers for Parallel Computing (LCPC), pages 205-219, 2006. doi.. 
  • Andrade, D., Arenaz, M., Fraguela, B. B., Touriño, J. and Doallo, R. Automated and Accurate Cache Behavior Analysis for Codes with Irregular Access Patterns. In In Proceedings of Workshop on Compilers for Parallel Computers (CPC), pages 179-193, 2006. doi.. 
  • Fraguela, B. B., Carmueja, M. G. and Andrade, D. Optimal Tile Size Selection Guided by Analytical Models. In Parallel Computing (ParCo), pages 565-572, 2005. doi.. 
  • Andrade, D., Fraguela, B. B. and Doallo, R. Modelado Analítico Automático del Comportamiento de la Caché para Códigos con Indirecciones. In Actas de las XVI Jornadas de Paralelismo, pages 321-328, 2005.
  • Andrade, D., Fraguela, B. B. and Doallo, R. Modeling the Cache Behavior of Codes with Arbitrary Data-Dependent Conditional Structures. In Asia-Pacific Computer Systems Architecture Conference (ACSAC), pages 44-57, 2004. doi.. 
  • Andrade, D., Fraguela, B. B. and Doallo, R. Efficient and Accurate Analytical Modeling of the Cache Behavior of Complete Scientific Codes. In IASTED International Conference on Applied Simulation and Modelling (ASM), pages 106-111, 2003.
  • Andrade, D., Fraguela, B. B. and Doallo, R. Cache Behavior Modeling of Codes with Data-Dependent Conditionals. In Workshop on Software and Compilers for Embedded Systems (SCOPES), pages 373-387, 2003. doi.. 
  • Andrade, D., Fraguela, B. B. and Doallo, R. Modelado de caches ante códigos con condicionales dependientes de datos. In Actas de las XIV Jornadas de Paralelismo, pages 281-286, 2003.