Gabriel Rodríguez

Associate Professor (Profesor Contratado Doctor)

Computer Architecture Group

University of A Coruña, Spain


Phone: +34 981 167 000, Ext. 6084

Office: D3.12, Edificio del Área Científica

Facultade de Informática, Campus de Elviña, s/n

15071 A Coruña, Spain

Research interests

  • Fault tolerance of parallel codes.
  • Compilers for embedded systems and high performance computing.
  • Emerging memory technologies.

Research positions

From time to time we have open positions for people wishing to pursue a career in research. If you are such an individual and are stimulated by computer architecture topics feel free to send me your motivation and résumé.

Selected recent publications

  • Nuria Losada, María J. Martín, Gabriel Rodríguez, Patricia González, I/O optimization in the checkpointing of OpenMP parallel applications, 23rd Euromicro International Conference on Parallel, Distributed and Network-based Processing, PDP'15. Turku (Finland), March 2015..
  • Gabriel Rodríguez, Juan Touriño, Mahmut T. Kandemir, Volatile STT-RAM scratchpad design and data allocation for low energy, ACM Transactions on Architecture and Code Optimization, in press.
  • José M. Andión, Manuel Arenaz, François Bodin, Gabriel Rodríguez, Juan Touriño, Locality-aware automatic parallelization for GPGPU with OpenHMPP directives , 7th International Symposium on High-level Parallel Programming and Applications, HLPP'14. Amsterdam (Netherlands), July 2014.
  • José M. Andión, Manuel Arenaz, Gabriel Rodríguez, Juan Touriño, A parallelizing compiler for multicore systems , 17th International Workshop on Software and Compilers for Embedded Systems, SCOPES'14. Schloss Rheinfels (Germany), June 2014.
  • Iván Cores, Gabriel Rodríguez, María J. Martín, Patricia González, In-memory application-level checkpoint-based migration for MPI programs , Journal of Supercomputing, 70(2):660-670, 2014.
  • José M. Andión, Manuel Arenaz, Gabriel Rodríguez, Juan Touriño, "A novel compiler support for automatic parallelization on multicore systems" , Parallel Computing, 39(9):442-460, 2013.